Task clustering approach to optimize the scheduling on a partially dynamically reconfigurable FPGAs for image processing algorithms
Résumé
Field-programmable gate array (FPGAs) are classified as high efficient computational execution platform. However their limited density makes them not suitable for highly demanding algorithms. The Partial Dynamic Reconfiguration (PDR) concept overcomes this problem by rising the FPGA reuse from one task to another. Nonetheless, the scheduling on partially dynamically reconfigurable architectures involves several degrees of freedom and hardware constraints to be managed, which makes the PDR more challenging. In this paper we propose a task clustering approach to optimize the scheduling on PDR FPGAs. By clustering tasks, the approach moves the optimizing overhead from hardware side into the software side, which is largely simple. © 2016 ACM.
Mots clés
Cameras
Computer hardware
Degrees of freedom (mechanics)
Dynamic models
Field programmable gate arrays (FPGA)
Hardware
Image processing
Reconfigurable architectures
Scheduling
Tracking (position)
Dynamically reconfigurable architecture
Execution platforms
Hardware constraints
High efficient
Image processing algorithm
Partial dynamic reconfiguration
Reconfigurable
Task clustering
Reconfigurable hardware