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Communication Dans Un Congrès Année : 2020

Approximate Buffers for Reducing Memory Requirements: Case study on SKA

Résumé

The memory requirements of digital signal processing and multimedia applications have grown steadily over the last several decades. From embedded systems to supercomputers, the design of computing platforms involves a balance between processing elements and memory sizes to avoid the memory wall. This paper presents an algorithm based on both dataflow and approximate computing approaches in order to find a good balance between the memory requirements of an application and the quality of the result. The designer of the computing system can use these evaluations early in the design process to make hardware and software design decisions. The proposed method does not require any modification in the algorithm's computations, but optimizes how data are fetched from and written to memory. We show in this paper how the proposed algorithm saves 23.4% of memory for the full SKA SDP signal processing computing pipeline, and up to 68.75% for a wavelet transform in embedded systems.
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Dates et versions

hal-02612369 , version 1 (19-05-2020)
hal-02612369 , version 2 (04-06-2020)

Identifiants

Citer

Hugo Miomandre, Jean-François Nezan, Daniel Menard, Adam Campbell, Anthony Griffin, et al.. Approximate Buffers for Reducing Memory Requirements: Case study on SKA. 34th 2020 IEEE Workshop on Signal Processing Systems (SiPS), Oct 2020, Coimbra, Portugal. pp.9195262, ⟨10.1109/SiPS50750.2020.9195262⟩. ⟨hal-02612369v2⟩
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