%0 Conference Proceedings
%T Efficient Matricization of n-D Array with CUDA and Its Evaluation
%+ CentraleSupélec
%+ Institut d'Électronique et des Technologies du numéRique (IETR)
%A Shaikh, M.A.H.
%A Hasan, K.M.A.
%A Ali, G.G.M.N.
%A Chafii, M.
%A Chong, P.H.J.
%< avec comité de lecture
%B 19th IEEE International Conference on Computational Science and Engineering, 14th IEEE International Conference on Embedded and Ubiquitous Computing and 15th International Symposium on Distributed Computing and Applications to Business, Engineering and Science, CSE-EUC-DCABES 2016
%C Paris, France
%8 2016-08-24
%D 2016
%R 10.1109/CSE-EUC-DCABES.2016.192
%K Array operations
%K CUDA
%K GPU
%K High Performance Computing
%K Matrix Operation
%K Matrix-Matrix Multiplication
%K Multidimensional Array
%K Parallel Computing
%Z Computer Science [cs]/Networking and Internet Architecture [cs.NI]
%Z Engineering Sciences [physics]/ElectronicsConference papers
%X Scientific and engineering computing requires operation on flooded amount of data having very high number of dimensions. Traditional multidimensional array is widely popular for implementing higher dimensional data but its' performance diminishes with the increase of the number of dimensions. On the other side, traditional row-column view is facile for implementation, imagination and visualization. This paper details a representation scheme for higher dimensional array with row-column abstraction on parallel environment. Odd dimensions contribute along row-direction and even dimensions along column direction which gives lower cost of index computation, higher data locality and parallelism. Each 2-D block of size blockIdx.x × threadIdx.x is independent of each other. Theoretically, it has no limitation with the number of dimensions and mapping algorithm is unique for any number of dimensions. Performance of the proposed matricization is measured with matrix-matrix addition, subtraction and multiplication operation. Experimental results show promising performance improvement over Traditional Multidimensional Array (TMA) and Extended Karnaugh Map Representation (EKMR). Thus the scheme can be used for implementing higher dimensional array in both general purpose and scientific computing on GPU. © 2016 IEEE.
%G English
%L hal-01622382
%U https://univ-rennes.hal.science/hal-01622382
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